The present disclosure relates to a semiconductor device and a method for fabricating the same, and more particularly relates to a stacked semiconductor device and a method for fabricating the same.
With recently enhanced function and performance of electronic devices, various studies have been conducted to increase the performance and degree of integration of semiconductor devices for use in electronic devices. Attention has been given, in particular, to three-dimensional stacked semiconductor devices each including a plurality of stacked semiconductor chips. In a three-dimensional stacked semiconductor device, it is significant to electrically connect two or more semiconductor chips together.
A technique in which bumps made of a metal are fusion bonded together has been known as a technique for electrically connecting two or more semiconductor chips together. However, if bumps are fusion bonded together, the bumps are deformed, which may result in a short circuit between the bumps. In addition, while semiconductor chips to be stacked are usually aligned at room temperature, bumps are fusion bonded together at high temperatures around 200° C. Thus, the difference in coefficient of thermal expansion (CTE) between a bonding device and the semiconductor chips warps semiconductor chips. As a result, the semiconductor chips are inevitably misaligned by several micrometers. This makes it difficult to further reduce the pitch between the bumps that are fusion bonded together.
Studies have been conducted on direct bonding of two semiconductor chips as a new bonding technique substituted for the technique for fusion bonding of bumps (see, for example, United States Patent Application Publication No. 2005/0161795). Specific examples of studied processes for directly bonding two semiconductor chips together include a process in which the surfaces of the semiconductor chips are cleaned to form dangling bonds, and the formed dangling bonds are covalently bonded together, a process in which the same metals are metallically bonded together, and a process in which an NHx group, an OH group, or any other appropriate group is attached to the surfaces to hydrogen bond the semiconductor chips together.
Semiconductor chips can be directly bonded together at lower temperatures than those at which bumps are fusion bonded together. Thus, the pitch between electrodes can be shorter than that obtained if bumps are fusion bonded together. While the foregoing technique is generally referred to as, for example, room temperature bonding or direct bonding, it is referred to as direct bonding in this specification.
In some cases, a semiconductor chip includes not only an active element such as a transistor, but also a passive element such as a resistance element, a capacitor element, and an inductor element. A passive element is generally provided in an interconnect layer. In order to provide a three-dimensional stacked semiconductor device including a passive element by direct bonding, it is suitable to form the passive element in an interconnect layer of one of semiconductor chips of the semiconductor device (see, for example, Japanese Unexamined Patent Publication No. 2011-211236).